Machine Learning for High Level Synthesis

Duration: Mar. 2021 – Oct. 2021 Advisor: Prof. Jieru Zhao at SJTU

Overview

Developed a machine learning framework using Graph Neural Networks to provide accurate and fast prediction of High-Level Synthesis (HLS) metrics, improving the design space exploration process.

Key Contributions

• Implemented Graph Neural Network models for HLS metric prediction
• Built a feature extraction system from HLS reports and intermediate files
• Designed pipeline for processing complex hardware design graphs
• Explored Neural Architecture Search for model optimization and transfer learning for large graphs

Technical Impact

This work addressed the critical challenge of predicting hardware synthesis outcomes early in the design process, potentially reducing design iteration time and improving hardware optimization workflows.